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Kintex-7 FPGAs Data Sheet: DC and AC Switching Characteristics
CLB Distributed RAM Switching Characteristics (SLICEM Only)
Table 30: CLB Distributed RAM Switching Characteristics
Speed Grade
Symbol
Description
1.0V
0.9V
Units
-3
-2/-2L
-1
-1M
-2L
Sequential Delays
T SHCKO
T SHCKO_1
Clock to A – B outputs
Clock to AMUX – BMUX outputs
0.68
0.91
0.70
0.95
0.85
1.15
0.85
1.15
1.08
1.44
ns, Max
ns, Max
Setup and Hold Times Before/After Clock CLK
T DS_LRAM /T DH_LRAM
T AS_LRAM /T AH_LRAM
A – D inputs to CLK
Address An inputs to clock
Address An inputs through MUXs
0.45/0.23
0.13/0.50
0.40/0.16
0.45/0.24
0.14/0.50
0.42/0.17
0.54/0.27
0.17/0.58
0.52/0.23
0.54/0.28
0.17/0.61
0.52/0.29
0.69/0.33
0.21/0.63
0.63/0.23
ns, Min
ns, Min
ns, Min
and/or carry logic to clock
T WS_LRAM /T WH_LRAM
T CECK_LRAM /
T CKCE_LRAM
WE input to clock
CE input to CLK
0.29/0.09
0.29/0.09
0.30/0.09
0.30/0.09
0.36/0.09
0.37/0.09
0.36/0.11
0.37/0.11
0.46/0.10
0.47/0.10
ns, Min
ns, Min
Clock CLK
T MPW
T MCP
Minimum pulse width
Minimum clock period
0.68
1.35
0.77
1.54
0.91
1.82
0.91
1.82
1.11
2.22
ns, Min
ns, Min
Notes:
1.
T SHCKO also represents the CLK to XMUX output. Refer to the timing report for the CLK to XMUX path.
CLB Shift Register Switching Characteristics (SLICEM Only)
Table 31: CLB Shift Register Switching Characteristics
Speed Grade
Symbol
Description
1.0V
0.9V
Units
-3
-2/-2L
-1
-1M
-2L
Sequential Delays
T REG
T REG_MUX
T REG_M31
Clock to A – D outputs
Clock to AMUX – DMUX output
Clock to DMUX output via M31 output
0.96
1.19
0.89
0.98
1.23
0.91
1.20
1.50
1.10
1.20
1.50
1.10
1.35
1.72
1.25
ns, Max
ns, Max
ns, Max
Setup and Hold Times Before/After Clock CLK
T WS_SHFREG /
T WH_SHFREG
T CECK_SHFREG /
T CKCE_SHFREG
T DS_SHFREG /
T DH_SHFREG
WE input
CE input to CLK
A – D inputs to CLK
0.26/0.09
0.27/0.09
0.28/0.26
0.27/0.09 0.33/0.09 0.33/0.11 0.41/0.10
0.28/0.09 0.33/0.09 0.33/0.11 0.42/0.10
0.28/0.26 0.33/0.30 0.33/0.36 0.41/0.36
ns, Min
ns, Min
ns, Min
Clock CLK
T MPW_SHFREG
Minimum pulse width
0.55
0.65
0.78
0.78
0.91
ns, Min
DS182 (v2.8) March 4, 2014
Product Specification
www.xilinx.com
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